Re: EXTERNAL: [vhdl-200x] VHDL ternary operation

At first I thought I knew what we were talking about, but then got confused and 
finally realized I was correct in my first thoughts.
So,  yes ternary operator(s) I now realize we don't have them in VHDL at the moment.
And I agree with Daniel and Jim in that they would be a useful language addition 
(at least from my user perspective!)
Now whilst I initially thought that the suggested versions of:
    ({cond} when {true} else {false})
or:
    ({cond} if {true} else {false})
were indeed very VHDL'y in their syntax, I can understand that they might incur 
ambiguities in their syntax implementation.
So as we already have introduced the '?' character in many operators within 
VHDL, why not stick to the more standard:
    ({cond} ? {true} : {false})
I hadn't realised just how many languages use this ternary operator or where it 
originated from (according to Wikipedia) being CPL.
The problem I see is this; how do we generate a syntax for writing the defining 
function?
We already have for unary operators:
    function "??" (right : anonymous) return binary;
and for binary operators:
    function "=" (left, right : anonymous) return binary;
So extending to ternary operators should be easy except for the function name. 
The operator name/character is split and so we need a new syntax in order to 
handle this.
I'll suggest one to start people thinking:
    function "?",":" (left : Boolean; middle, right : anonymous) return 
middle'subtype;
where:
    left   -> {condition}
    middle -> {value when true}
    right  -> {value when false}
and using Jim's proposed anonymous types (which I also like).


Regards,
Brent.


On 28/03/2013 18:33, Jim Lewis wrote:
> Daniel,
> We talked about something for 2008, however, it evolved from:
> ("pass" when fault else "fail")
>
> But this was problematic due to conditional assignment.
> Then we considered:
> ("pass" if fault else "fail")
>
> This was ok, but was rejected since some wanted "less"
> typing, and hence, proposed:
> ("pass" if fault, "fail")
>
> This turned out to have some ambiguity problems and was
> rejected.  We never did go back to considering "else".
>
> For the next revision, I am hoping to have functions that
> allow usage of anonymous types.  And hence, we could write
> something like:
>
> function cond (
>   sel : boolean ;
>   A   : anonymous ;
>   B   : A'subtype
> ) return A'subtype is
> begin
>   if Sel then
>     return A ;
>   else
>     return B ;
> end function cond ;
>
> Anonymous types would own a broad space of the overloading.
> Hence, we could not write a function with the signature:
> cond[boolean, std_logic, std_logic return std_logic]
>
> but we could write a function with the signature:
> cond[std_logic, anonymous, anonymous return anonymous]
>
> For this particular issue we could of course also
> consider language syntax.  However, I like general features
> and subprograms as a little gives us alot of capability.
>
> Best Regards,
> Jim
>
>
>> Daniel,
>>
>> /_"pass" when fault else "fail"_/is NOT an expression. It is the RHS of a 
>> conditional assignment statement. Such a RHS may contain expressions, but 
>> expressions may not contain a conditional assignment
>> RHS.
>>
>> Since conditional assignments can be open-ended, in effect meaning that the 
>> assignment does not occur if no “when” expression evaluates as true, its use 
>> as an expression is not possible.
>>
>> To solve your immediate problem, you could write a function that takes a 
>> boolean argument and returns “pass” or “fail” strings, or you could create a 
>> constant array of two strings, indexed by boolean,
>> e.g. (true => “fail”, false => “pass”). Then you could include the function 
>> call or constant in your report expression.
>>
>> Andy
>>
>> *From:*owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] *On Behalf Of 
>> *Daniel Kho
>> *Sent:* Thursday, March 28, 2013 4:19 AM
>> *To:* vhdl-200x@eda.org
>> *Subject:* EXTERNAL: [vhdl-200x] VHDL ternary operation
>>
>> Hi all,
>>
>> I'm wondering if the current revision supports something like the following?
>>
>> report to_hstring(index) & ", " & ("pass" when fault else "fail") & lf & nul;
>>
>> where "index" is an unsigned vector, and "fault" is a boolean.
>>
>> The expression ("pass" when fault else "fail") can already be used directly 
>> in clocked processes, but I'm not too sure if the standard allows this to be 
>> used within report statements.
>>
>> If there's a better way of writing which could produce the same effect, do 
>> share with me as well.
>>
>> regards, daniel
>>
>>
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Regards,

         Brent Hayhoe.

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