RE: EXTERNAL: Re: [vhdl-200x] Fwd: Proposal for the next version of the IEEE 1076 standard

Note that direct entity instantiation, available since the '93 standard, allows the specification of the architecture to be bound to the entity instantiated. No configurations required. However the architecture name is specified as a literal (not a generic or constant value). So there is not a good way to select the architecture from higher levels of hierarchy.

One could use a higher level entity generic, coupled with a series of if-generates that instantiate the entity with each possible architecture depending on the value of the upper level generic. If you know the choices of allowable architecture names ahead of time, this would work, but not for arbitrarily named, yet to be written architectures.

Note the compiler verifies that the specified architecture exists (has been compiled) for an entity instantiation, even if a surrounding if-generate does not allow the instantiated entity/architecture pair to be elaborated. Among other side effects, this enforces an order of compilation that is not required when configurations are used. It is a small price to pay, IMHO, for avoiding the aches and pains of maintaining configuration(s).

Andy D Jones
Electrical Engineering
Lockheed Martin Missiles and Fire Control
Dallas TX

-----Original Message-----
From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of Jim Lewis
Sent: Monday, February 04, 2013 11:45 AM
To: vhdl-200x@eda.org
Subject: EXTERNAL: Re: [vhdl-200x] Fwd: Proposal for the next version of the IEEE 1076 standard

My reply to Lars:
[clip .. stuff on joining working group]

WRT your request, note currently you can use configuration declarations to do this.  In the following, CfgUart is a testbench level configuration that reaches down through the FPGA design to select the architecture uart_arch_1 of the subblock Uart.  Note that currently you must use component declarations and component instances ( vs entity instances) to be able to select architectures in a configuration.


Library LIB_MemIO ;
configuration CfgUart of testbench is
   for Structural

     for U_FPGA : FPGA
       use entity Lib_FPGA.FPGA (fpga_arch) ;

       for fpga_arch

         for U_Uart : Uart
           use entity Lib_FPGA.Uart(uart_arch_1) ;
         end for ;

       end for ;
     end for ;
   end for ;
end CfgUart ;


This should at least help out for the time being.
One reason people don't use configurations much is that the synthesis tools don't like them.  However, for synthesis we can manage the problem by using the most recently compiled architecture.

If this does not meet your needs entirely, we would need a use model that elaborates how you intend to use the new feature.

Note you can emulate your request using if-generate to instantiate a specific architecture and a generic makes a specific if-generate true.  With a VHDL-2008 tool you will also have elsif and else with if-generate and also have case generate.

Best Regards,
Jim

--
This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.


-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.