Hi everyone, I was just reading through Peter Ashenden's analysis of the VHDL2008 IR 2119: http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2119.txt and was surprised that to see that there wasn't more support for this. I know it caught me out in the same way as the proposer described and at around the same time. Maybe users hadn't gotten around to using shared variables because of the (perceived) hassle of declaring protected types and thus the lack of support for this proposal. I know a lot of users that I come across still find them (protected types) a bit 'mind bending' at first. It's something that hassles me in my verification jobs a lot and so I thought that I'd resurrect the issue again, so comments please: http://www.eda-twiki.org/cgi-bin/view.cgi/Sandbox/DeferredSharedVariables Thanks in advance. -- Regards, Brent Hayhoe. Aftonroy Limited Telephone: +44 (0)20-8449-1852 135 Lancaster Road, New Barnet, Mobile: +44 (0)79-6647-2574 Herts., EN4 8AJ, U.K. Email: Brent.Hayhoe@Aftonroy.com Registered Number: 1744190 England. Registered Office: 4th Floor, Imperial House, 15 Kingsway, London, WC2B 6UN, U.K. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Dec 17 12:05:11 2012
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