> I don't understand Jonathan's idea to make an easy interface to other language
> since most simulators already provide this. In my case (I use Modelsim) it is
> very easy to add a SystemC testbench to my VHDL code or to use the DPI
> interface via a thin SV layer, standardizing this is not going to make any
> difference to me.
Actually, I do understand what Jonathan is suggesting, we are not talking about
a C-interface but a standardized interface that is flexible enough to bold on
say a constraint solver, to allow OSCI to run concurrently, to allow data
introspection and manipulation of signal/variables.
This could be considered a leapfrog since we are not extending the language but
the capabilities of third party to add interfaces.
Hans
www.ht-lab.com
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