Hi everyone,
The library/package structure is quite restrictive compared to the
namespace stuff that can be found in other (computer science) languages.
The namespace paradigm is based on a possible deep tree structure while
the library/package structure implies the tree depth to be equal to 2.
If VHDL supports a deeper structure, fine grained package names could be
allowed. For instance, proc.alu.arith.multiplier would refer to
multiplier components that will be used for the arithmetic part of a
processor ALU.
Nowadays, we can already name such a package “proc.alu_arith_multiplier”
(to follow IEEE package naming convention) but as you can see, the deep
structure is flattened in order to fit in the tree depth = 2.
Cheers,
-- Florent Ouchet PhD Student CIS/VDS Team - TIMA Laboratory -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Dec 6 03:13:26 2010
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