Re: [vhdl-200x] [Fwd: VHDL vector/matrix package?]

Yes, I can see that for VHDL synthesis compatibility will be an issue. This is something we haven't seen with 1076.1 yet as there is no AMS synthesis. I think this raises two questions:

Would a vector/matrix capability be useful without considerations for synthesis compatibility, for example for behavioral models used during verification?
What additional requirements would be imposed to make vector/matrix operations synthesis compatible? Specifically, what scope are we talking about. For example, is something like synthesizing a signal processor given an algorithm a valid use case?

Ernst

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Ernst Christen, christen.1858@verizon.net on 4/20/2010
> On 4/15/2010 9:26 AM, Jim Lewis wrote:
>
> > Has anything like this been considered for 1076, or do you know of an
> > implementation of a proprietary package for this purpose? We have not
> > gone far with it yet, we are still discussing requirements and scope.
> > Any information you have will be helpful for out planning. I am also
> > planning to consult with vhdl-200x to get feedback before we move
> > beyond
> > requirements.
>
> I started looking into this about 2 years ago.  Lately I've been doing a
> good deal of work with Matlab, and seeing how easy it is to manipulate a
> matrix in that language.  I'd like to see that sort of ability in VHDL.
>
> The big issue as I see it is synthesis compatibility.  You pretty much
> can't do this without the ability to infer a memory element.  You also
> need some sort of trade off between different types of memories.
> How would you declare a matrix of X dimensions generically?
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