Dear Colleagues, Voting results are posted at: http://www.eda-stds.org/vasg/voting/2007_0410_IR_VOTE.pdf Updated VASG voting records are at: http://www.eda-stds.org/vasg/voting/vasg_roster.pdf Best Regards, Jim > Dear colleagues, > This is a call for vote from IEEE P1076 WG members on the next group of > ISAC issues listed below. The ISAC has analyzed the issues and made > recommendations for interpretation of the IEEE 1076-2002 standard and for > future revisions of the standard. This vote is for approval of the ISAC > recommendations. > > Please note that, in some cases, a recommendation may be to reject a > request. In that case, a vote to approve the recommendation means > rejecting > the request, whereas a negative vote means reconsidering the request. > Please > take care with the logical sense of your vote in such cases. > > Also note that some of the issues do not specify detailed LRM edits to > implement a change. The intention is that the detailed changes be > specified > in a Language Change Specification (LCS) document that will be voted on > separately. The intent of this vote is to determine whether such an LCS is > required. > > Only votes of eligible voters will be counted. Votes from ineligible > voters > will be recorded for information and for adding to your "last 2 or 3" > participation count. I will acknowledge each vote received and indicate > whether it was counted or not. > > Please forward votes to me by email (eg, by replying to this message) by > 5pm > US-PDT, Tuesday April l0, 2006. > > For each issue, would you please vote one of: approve, negative with > comments, negative with no comments, or abstain. You may also provide > informative comments with a vote to approve a recommendation. Please use > the form below. Thank you. > > Regards, > > Jim Lewis > P1076 Chair > > > > Issue Approve Negative Negative Abstain > with comment no comment > > 2096 Error is ambiguous > http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2096.txt > 2096 ____ ____ ____ ____ > > Comment: > > > 2097 Operations with Array aggregates > http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2097.txt > 2097 ____ ____ ____ ____ > > Comment: > > > 2098 Ambiguity in definition of T'VAL for Physical types > http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2098.txt > 2098 ____ ____ ____ ____ > > Comment: > > > 2101 Type conversion - implicit refers to section 8.1.2 which doesn't > exist > http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2101.txt > 2101 ____ ____ ____ ____ > > Comment: > > > 2104 Using a configuration to leave a design unbound > http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2104.txt > 2104 ____ ____ ____ ____ > > Comment: > > > 2105 Can't declare an alias of a character literal without using > expanded name > http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2105.txt > 2105 ____ ____ ____ ____ > > Comment: > > > 2107 Editorial process dropped a \ from extended identifier example > http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2107.txt > 2107 ____ ____ ____ ____ > > Comment: > > > > > > -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787 Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Apr 20 19:03:11 2007
This archive was generated by hypermail 2.1.8 : Fri Apr 20 2007 - 19:05:29 PDT