Re: [vhdl-200x] CFV: Proposal to Merge P1604 into P1076

It's even worse that that. The "major" FPGA vendor calls
out "std_logic_arith" in their primitive libraries. The majority
of the people who do FPGAs these days use VHDL.

We plan to include "std_logic_textio" in the next release of
1164, but as of now it is still a "non IEEE" package which we
basically can't live without.

Paul Graham wrote:
>>I don't think the IEEE library should have anything in it that is
>>not already an IEEE standard (or is at least in the process of being
>>standardized). Vendor distributions should only include design
>>units that are approved to be in this library.
>
>
> std_logic_arith is a de facto standard. What synopsys vhdl customer
> would even bother to evaluate a cadence tool if it didn't come with
> std_logic_arith? Arguing about whether this widely used package is
> "legal" or a "standard" is a waste of energy.

-- 
David W. Bishop dbishop@vhdl.org       All standard disclaimers apply.