Subject: Re: [vhdl-200x] Implicit conversion, Overloading, & Strong Typing
From: Gabe Moretti (gmoretti@comcast.net)
Date: Fri Dec 19 2003 - 07:56:14 PST
What Scott suggests is not a robust solution. In fact what would
(if (we_n) then
mean? Who is going to infer that we_n is a negative active signal? I
certainly would not count on the "_n" portion of the name. And I would not
want a compiler to infer that all signals ending with "_n" are negative
acting.
Gabe
----- Original Message -----
From: "Scott Thibault" <thibault@gmvhdl.com>
To: "Jay Lawrence" <lawrence@cadence.com>; "VHDL-200x" <vhdl-200x@eda.org>
Sent: Friday, December 19, 2003 10:04 AM
Subject: RE: [vhdl-200x] Implicit conversion, Overloading, & Strong Typing
> >
> > I think that in VHDL in general this does not save significant typing
> > and does not add much value, however when you consider PSL assertions
> >
>
> I don't think typing is the real benefit here. I don't think I have ever
> mistakenly typed:
> if (we = '0') then
> or
> if (we_n = '1') then
>
> However, I have many many times typed:
> if (we) then
>
> The result being that when I finally compile the design, I'm met with a
long
> list of compiler errors. This is frustrating and reduces productivity.
>
> --Scott Thibault
> Green Mountain
> Computing Systems, Inc.
> http://www.gmvhdl.com
>
>
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