Subject: RE: [vhdl-200x] Corrections to Minutes for VHDL-200X-FT meeting, San Jose Dec 4, 2003
From: Marcus Harnisch (marcus_harnisch@mint-tech.com)
Date: Wed Dec 10 2003 - 15:08:40 PST
Stephen,
Bailey, Stephen writes:
> I know the benefits of using mnemonic identifiers as it
> has been drilled into me since my earliest of computer science classes.
^^^^^^^^^^^^^^^^
So I take it, that it wasn't the the most obvious thing for you to use
in the beginning, right ;-)
> Finally, I'm damn tired of hearing the comments that users need to
> get better editors/tools to work-around the verbosity of VHDL.
Let's face it, better tools will always increase productivity. If you
want to stick to ed(1) you will have to suffer at one point or
another. Come on, typing `to_str' is really not that much better than
`to_string' -- even in ed.
> The success of VHDL should NEVER be dependent on requiring users to
> use such tools.
Nobody *requires* you to do anything like that. You can write your own
package. I bet you'd find a Perl module on CPAN that generates unique
abbreviations that kind of make sense for a set of words. So that
could even be an automated process.
I wouldn't mind if anybody came up with a package like
`mnemonic.c_types'. I just wouldn't want to have it at the language
level or as part of a standard package.
Please let's not forget how working in a language feels like. So a
rather verbose language like VHDL, would look and even write funny if
suddenly a significant group of (standard) additions were implemented
as TLAs. This is similar to (plain) C code, for instance, in which
people used mixed case identifiers. It's legal -- it might have
advantages -- but it looks and feels strange.
Best regards,
Marcus
-- Marcus Harnisch | Mint Technology, a division of LSI Logic marcus_harnisch@mint-tech.com | 200 West Street, Waltham, MA 02431 Tel: +1-781-768-0772 | http://www.lsilogic.com
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