[vhdl-200x] [Fwd: Multi-dimentional arrays in components using generics]


Subject: [vhdl-200x] [Fwd: Multi-dimentional arrays in components using generics]
From: Jim Lewis (Jim@synthworks.com)
Date: Fri Jul 11 2003 - 17:20:06 PDT


Another interesting problem.

-------- Original Message --------
Subject: Multi-dimentional arrays in components using generics
Date: Wed, 9 Jul 2003 11:52:35 +0200
From: "Willem Oosthuizen" <willy@asic.co.za>
Organization: The South African Internet Exchange
Newsgroups: comp.lang.vhdl

How do I do multi-dimentional arrays in components using generics

I tried the following. This does not work. I need to define the type
array(Depth -1 downto 0) of std_logic_vector(Width-1 downto 0) and
type array(Depth -2 downto 0) of std_logic_vector(Width-2 downto 0)
somewhere. But where?

COMPONENT Reduce is
generic
( Width : integer;
   Depth : integer
);
port
( D_IN : IN array(Depth -1 downto 0) of std_logic_vector(Width-1 downto
0);
   Q : OUT array(Depth -2 downto 0) of std_logic_vector(Width-2 downto
0);
);
end COMPONENT;

-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~



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