Subject: Re: [vhdl-200x] Re: TBV2: Associative arrays proposal submitted
From: Colin Marquardt (c.marquardt@alcatel.de)
Date: Mon Apr 28 2003 - 08:31:25 PDT
Stephen Bailey <SBailey@Model.com> writes:
> The address bus is typically modeled as a bit vector and not as an integer
> value.
Really? Not around here at least. I have nothing against supporting
both vectors and integers of course.
Cheers,
Colin
-- > . . . I along with many other hardware engineers can already > see the day when your boss doesn't hand you a Word or PDF > document for the specifications of a design, but instead will > hand you a VHDL or Verilog testbench file. Wow. The future is bright. In 2003, I'm lucky to get 3 bullet items on a powerpoint slide :) [Mike Treseler in comp.arch.fpga]
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