Subject: [vhdl-200x] Re: [vhdlsynth] Fixed point arithmetic in 1076.3
From: Jim Lewis (Jim@synthworks.com)
Date: Wed Mar 05 2003 - 08:52:39 PST
David,
For 200X (perhaps fasttrack), do we need to
propose a string literal format for real and
fixed point numbers?
Cheers,
Jim
Rob Anderson wrote:
> Good idea, I second it.
>
> #2 looks like the way to go, and I would interpret "fixed" as
> a signed number.
>
> What would be the rules wrt. the size of the range for various
> operators? We would probably need a way to adjust it.
>
> --Rob
>
> David Bishop wrote:
>
>> Proposal:
>> Added the ability to do fixed point arithmetic to 1076.3
>>
>> Proposer: David Bishop (dbishop@vhdl.org)
>>
>> Status: Proposed 3/5/2003
>>
>> Detail:
>> There are two ways to implement this:
>> 1) Modify the "signed" and "unsigned" types in 1076.3 to
>> be "array (integer range <>)" instead of the current
>> "array (natural range <>)" and use anything that is a
>> negative index to be the part of the number less than
>> zero. For positive indices the functionality will
>> not change. (Problem, what to do with "signed (-3 to 3)"?).
>> 2) Created a new type called "fixed" which will be a
>> "array (integer range <>) of std_logic" that will be
>> used for fixed point arithmetic. (signed or unsigned?)
>> Please tell me what you think. Note that this discussion
>> will parallel one on the Verilog 200x side.
>>
>> Analysis:
>> [To be performed by the P1076.3 Working Group]
>>
>> Resolution:
>> [To be determined by the P1076.3 Working Group]
>>
>>
>
>
>
-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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