Subject: [vhdl-200x] my priorities
From: Francoise Martinolle (fm@cadence.com)
Date: Tue Mar 04 2003 - 06:44:46 PST
Steve,
Do we have a better definition of the line items in the XL spreadsheet?
Since I did not
participate in the meeting, some of the items have an obscure meaning to
me. The understanding
of some of the items could add or change my priorities.
please see my priorities as follow:
1. enhance VHDL assertions
2. implicit generic port map in component instances (*)
3. testbench verification
associative arrays
sparse arrays
dynamic processes
data types and abstraction
4. don't care in case statements and compares
identify processes as combinatorial
simulation control subprograms
XMR
5. vcd for VHDL
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