RE: [sv-champions] Email vote ending June 11, 2011

Neil,

I have comments for: 2905 and opposed 2889

> 1. 3254 <http://www.eda-twiki.org/svdb/view.php?id=3254> Errata SV-EC
> 18.5.6 if-else constraints mistakenly uses the work "block" when
> it means "set"
> There is a proposal (2 words changed in one paragraph)
> Approved in email vote 5/11/2011. proposal:
> 3254_constraint_set.pdf
>
> Approve _X_ Oppose __
>
>
> 2. 2905 <http://www.eda-twiki.org/svdb/view.php?id=2905> Errata SV-EC BNF
> bug for attribute instance along with timeunits_declaration
> There is a proposal (one change to the timeunits BNF)
> Approved in email vote 5/11/2011, proposal:
> 2905_attribute_timeunits.pdf
>
> Approve __ Oppose __

I am not opposing to the change but I am not quite sure why we would not allow attribute_instances on timeunits declarations. attribute_instances are allowed on module items, port declarations and non port module items. Is it because you can have the same time unit declaration more than once in the same scope and there would be an issue if the attribute instance was specified on one time unit but not the other time unit declaration?

> 3. 2935 <http://www.eda-twiki.org/svdb/view.php?id=2935> Errata SV-EC
> Correction to example in 9.7. in 1800-2009
> No change required - has already been fixed
> Approved by email vote, 5/11/2011. CLOSE as already fixed.
>
> Approve _X_ Oppose __
>
>
> 4. 2463 <http://www.eda-twiki.org/svdb/view.php?id=2463> Errata SV-BC
> 9.4.3: Description of repeat event control is in the wrong place
> No change required
> On May 23, 2011 by email vote the SV-BC unanimously agreed this
> issue was addressed in 1800-2009.
>
> Approve X__ Oppose __
>
>
> 5. 1214 <http://www.eda-twiki.org/svdb/view.php?id=1214> Errata SV-BC Why a
> separate package name space? (19.13)
> No change required
> On May 23, 2011 by email vote the SV-BC unanimously agreed this
> issue was addressed in 1800-2009.
>
> Approve _X_ Oppose __
>
>
> 6. 2540 <http://www.eda-twiki.org/svdb/view.php?id=2540> Clarificatio SV-BC
> Package and identifier "::" rules
> No change required
> On May 23, 2011 by email vote the SV-BC unanimously agreed this
> issue was addressed in 1800-2009.
>
> Approve _X_ Oppose __
>
>
> 7. 2982 <http://www.eda-twiki.org/svdb/view.php?id=2982> Errata SV-BC
> Keyword "rand" is used in example as variable ident - this should
> not compile
> There is a proposal - small changes to two examples - old 1364
> example that now conflicts with new SystemVerilog keywords.
>
>
> Approve _X_ Oppose __
>
>
> 8. 0245 <http://www.eda-twiki.org/svdb/view.php?id=0245> Clarification
> SV-EC Array of queues
> No change required
> SV-EC meeting April 11 2011: close mantis 245, as already
> implemented. One abstain vote from Gord: The summary says array of
> queues - not sure that what exists is as general as what was
> requested. Persistence of elements is a key point with this.
>
> Approve _x_ Oppose __
>
>
> 9. 2985 <http://www.eda-twiki.org/svdb/view.php?id=2985> Clarification
> SV-EC Multi-dimensional queues
> Duplicate of 245
> Unanimoulsy approved: April 11 2011
>
> Approve _X_ Oppose __
>
>
> 10. 3297 <http://www.eda-twiki.org/svdb/view.php?id=3297> Errata SV-EC text
> 18.6.2 font size issue
> There is a proposal - font changes in several places
> Unanimously approved: sv-ec meeting April 11 2011 proposal:
> 3297_font_size.pdf
>
> Approve _X_ Oppose __
>
>
> 11. 3181 <http://www.eda-twiki.org/svdb/view.php?id=3181> Errata SV-EC minor
> incorrect syntax in with clause in example in 18.5.7.2
> There is a proposal - changes one line of one example
> Unanimously approved: sv-ec meeting April 11 2011. proposal:
> 3181_with_parentheses.pdf
>
> Approve _X_ Oppose __
>
>
> 12. 2952 <http://www.eda-twiki.org/svdb/view.php?id=2952> Errata SV-EC text
> Identifier case error in 25.9 virtual interface example
> There is a proposal - corrects several typos in one example
> Unanimously approved, sv-ec meeting April 11 2011.
>
> Approve _X_ Oppose __
>
>
> 13. 3405 <http://www.eda-twiki.org/svdb/view.php?id=3405> Errata SV-EC text
> Virtual interface example typos
> Duplicate of 2952
> SV-EC April 11 2011 meeting: Unanimously approved to close 3405
> mantis as duplicate of 2952.
>
> Approve _X_ Oppose __
>
>
> 14. 2662 <http://www.eda-twiki.org/svdb/view.php?id=2662> Clarification SV-B
> misleading pseudo-nonterminal name in escaped identifier
> production in Annex A
> There is a proposal - a one line bnf change
> On May 4, 2011 the SV-BC unanimously approved the attached
> proposal via email vote.
>
> Approve _X_ Oppose __
>
>
> 15. 3216 <http://www.eda-twiki.org/svdb/view.php?id=3216> Errata SV-BC minor
> 'simple_type' excerpt error
> There is a proposal - a one line bnf change
> On May 4, 2011 the SV-BC unanimously approved the attached
> proposal via email vote.
>
> Approve _X_ Oppose __
>
>
> 16. 2901 <http://www.eda-twiki.org/svdb/view.php?id=2901> Errata SV-BC minor
> var and type() in for_variable_declarations
> There is a proposal - another bnf change
> On May 4, 2011 the SV-BC unanimously approved the attached
> proposal via email vote.
>
> Approve _X_ Oppose __
>
>
> 17. 3233 <http://www.eda-twiki.org/svdb/view.php?id=3233> Errata SV-BC minor
> implicit wire declarations should occur in instantiations of
> programs/interfaces also
> There is a proposal - a one line change
> On May 4, 2011 the SV-BC unanimously approved the attached
> proposal via email vote.
>
> Approve _X_ Oppose __
>
>
> 18. 2835 <http://www.eda-twiki.org/svdb/view.php?id=2835> Errata SV-BC minor
> It should be legal to explicitly specify let arguments as untyped
> There is a proposal - one line bnf update
> On May 4, 2011 the SV-BC unanimously approved the attached
> proposal via email vote.
>
> Approve _X_ Oppose __
>
>
> 19. 3151 <http://www.eda-twiki.org/svdb/view.php?id=3151> Errata SV-BC minor
> Unnecessary variable declaration in factorial function (13.4.2)
> There is a proposal - one line change to an example
> On May 4, 2011 the SV-BC unanimously approved the attached
> proposal via email vote.
>
> Approve _X_ Oppose __
>
>
> 20. 0696 <http://www.eda-twiki.org/svdb/view.php?id=0696> Enhancement SV-BC
> Ballot Feedback Issue 225: Add parameterized tasks and functions
> There is a proposal - adds a new sub-clause (2 pages)
> On October 25, 2010 the SV-BC unanimously approved the attached
> proposal.
> The proposal (rev6) was unanimously approved by the SV-EC in the
> February 14, 2011 conference call.
>
> Approve _X_ Oppose __
>
>
> 21. 3491 <http://www.eda-twiki.org/svdb/view.php?id=3491> Errata SV-AC
> trivial Incorrect local variable flow rule in F.5.4
> There is a proposal - it is hard to spot, but it adds one parenthesis
> Passed by email ballot 2011-04-25: 8y/1a/0n. Comment by Erik
> Seligman (abstained): I don't understand the formal semantics well
> enough to figure out if this is ultimately the desired expression,
> so I'll have to trust you guys!
>
> Approve _X_ Oppose __
>
>
> 22. 3384 <http://www.eda-twiki.org/svdb/view.php?id=3384> Clarification
> SV-BC Clarifications on integer data type signing
> There is a proposal - correction in a few spots concerning
> 'unsigned'.
> During its April 25 meeting, 2011 the SV-BC unanimously approved
> the attached proposal.
>
> Approve _X_ Oppose __
>
>
> 23. 3026 <http://www.eda-twiki.org/svdb/view.php?id=3026> Errata SV-BC text
> Mess with $rewind and $frewind
> There is a proposal - a couple of changes from $frewind to $rewind.
> On April 20, 2011 the SV-BC unanimously approved by email vote the
> attached proposal.
>
> Approve _X_ Oppose __
>
>
> 24. 3362 <http://www.eda-twiki.org/svdb/view.php?id=3362> Errata SV-BC text
> "literal string" should be "string literal" - two more
> There is a proposal - changes "literal string" to "string literal"
> On April 20, 2011 the SV-BC unanimously approved by email vote the
> attached proposal.
>
> Approve _X_ Oppose __
>
>
> 25. 3274 <http://www.eda-twiki.org/svdb/view.php?id=3274> Errata SV-BC text
> 'shortreal' should be bold
> There is a proposal - changes two keywords to being bold.
> On April 20, 2011 the SV-BC unanimously approved by email vote the
> attached proposal.
>
> Approve _X_ Oppose __
>
>
> 26. 3062 <http://www.eda-twiki.org/svdb/view.php?id=3062> Errata SV-BC minor
> Extra space in %t example
> There is a proposal - removes whitespace from several lines of a
> file-format example
> On April 20, 2011 the SV-BC unanimously approved by email vote the
> attached proposal.
>
> Approve _X_ Oppose __
>
>
> 27. 2977 <http://www.eda-twiki.org/svdb/view.php?id=2977> Errata SV-BC text
> [EDITORIAL ISSSUE] Wrong characters used in LRM example for array
> literal
> There is a proposal - fixes the font used for a "tick" in 1'b1
> On April 20, 2011 the SV-BC unanimously approved by email vote the
> attached proposal.
>
> Approve _X_ Oppose __
>
>
> 28. 2976 <http://www.eda-twiki.org/svdb/view.php?id=2976> Errata SV-BC text
> wrong xref at end of configurations clause
> There is a proposal - changes a cross-reference
> On April 20, 2011 the SV-BC unanimously approved by email vote the
> attached proposal.
>
> Approve _X_ Oppose __
>
>
> 29. 2595 <http://www.eda-twiki.org/svdb/view.php?id=2595> Errata SV-BC text
> protect pragma is also standard
> There is a proposal - adds one sentence to the "Standard pragmas"
> sub-clause. It now references the "protect" pragma.
> On April 20, 2011 the SV-BC unanimously approved by email vote the
> attached proposal.
>
> Approve _X_ Oppose __
>
>
> 30. 2271 <http://www.eda-twiki.org/svdb/view.php?id=2271> Errata SV-AC minor
> sequence events require a clocked sequence
> Duplicate
> Approved by voice vote 2011-04-12: 8y/0n/0a. This issue is covered
> by 2412.
>
> Approve _X_ Oppose __
>
>
> 31. 3423 <http://www.eda-twiki.org/svdb/view.php?id=3423> Errata SV-CC minor
> No way in VPI to trace instance-array connections across
> named-connections and dot-star connections
> There is a proposal - adds a few paragraphs to 37.11 Instance arrays
> On Mar-30-2011, the SV-CC PASSED this proposal (unanimous)
>
> Approve _X_ Oppose __
>
>
> 32. 2929 <http://www.eda-twiki.org/svdb/view.php?id=2929> Errata SV-BC minor
> ref_declaration should use list_of_variable_port_identifiers
> There is a proposal - One-line bnf change
> On December 3, 2010 the SV-BC unanimously approved the attached
> proposal.
>
> Approve _X_ Oppose __
>
>
> 33. 2395 <http://www.eda-twiki.org/svdb/view.php?id=2395> Errata SV-BC minor
> Incorrect note attached to net_port_type production
> There is a proposal - removes note 15 from the bnf.
> On December 3, 2010 the SV-BC unanimously approved the attached
> proposal.
>
> Approve __X Oppose __
>
>
> 34. 1106 <http://www.eda-twiki.org/svdb/view.php?id=1106> Errata SV-BC minor
> procedural assign to nonconstant part select and force of
> nonconstant bit-select
> No change required
> On December 3, 2010 the SV-BC unanimously approved to resolve this
> issue with no change because it was already addressed.
>
> Approve _X_ Oppose __
>
>
> 35. 2889 <http://www.eda-twiki.org/svdb/view.php?id=2889> Errata SV-BC minor
> .named_port(expression) in ANSI-style port declaration list should
> reset properties
> There is a proposal - adds a few new paragraphs
> On January 28, 2011 the SV-BC concluded an email vote that
> unanimously approved the attached proposal.
>
> Approve __ Oppose _X_

I think that the proposal is incomplete, it does not say how to determine if a named port expression is a wire or a variable.
Specifically in the example:
module mh22 (input wire integer p_a, .p_b(s_b), p_c); What is the port p_b? a wire or a variable? The rules for port declarations determine the port kind of by looking at the datatype of the port. Do these rules apply?
Either we apply the rules for normal port declarations or we have to choose a default for non explicit port kind. For example the default is variable.
If we have to follow the normal port declaration rules, since p_b has no explicit port kind and this is NOT the first port, we need to apply the following rules:
"
If the port kind is omitted:
- For input and inout ports, the port shall default to a net of default net type. The default net type can be changed using the `default_nettype compiler directive (see 22.8).
- For output ports, the default port kind depends on how the data type is specified:
- If the data type is omitted or declared with the implicit_data_type syntax, the port kind shall default to a net of default net type.
- If the data type is declared with the explicit data_type syntax, the port kind shall default to variable.
- A ref port is always a variable.
"
Since p_b inheritis the input direction, first bullet applied and this is a net.

But what about if the port p_b was the first port, which rules do we apply to determine the port kind, direction and data type?
module mh22 (.p_b(s_b), p_c);
Do we expect the rule to apply: (i.e this is not a ANSI style port)
For the first port in the port list:
- If the direction, port kind, and data type are all omitted, then the port shall be assumed to be a
member of a non-ANSI style list_of_ports, and port direction and type declarations shall be declared
after the port list.
I think I would like this to be specified with more details.

>
>
> 36. 2506 <http://www.eda-twiki.org/svdb/view.php?id=2506> Enhancement SV-EC
> Non-trivial coverage space shapes and joint conditions are
> difficult to specify with covergroups
> There is a proposal - this is a large proposal (17 pages)
> Proposal for 2506 is approved on 5/23/2011 with one Absain
> [Steven: does not know in detail about the topic]
>
> Approve _X_ Oppose __
>
>
> 37. 3385 <http://www.eda-twiki.org/svdb/view.php?id=3385> Errata SV-AC
> Possible ambiguity when deferred assertion action block calls
> nested function
> There is a proposal (2 pages)
> Approved by voice vote 2011-05-17: 19y/0n/0a.
>
> Approve _X_ Oppose __
>

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