Re: [P1800] P1800 SystemVerilog Ballot Draft (4.0) is ready

There is a page numbering problem.

Clause 1 ends on page 7, page 8 is empty, then Clause 2 starts on page 1
again.

Shalom


On Mon, 14 Feb 2005, Johny Srouji wrote:

> 
> Hi All, 
> 
> Please note that P1800 SystemVerilog Ballot draft is ready and was
> uploaded (thanks to Dennis) to our web site under:
> http://grouper.ieee.org/groups/1800/private/P1800-draft4_SystemVerilog_L
> RM.pdf 
> 
> This version is a clean draft (no colored text, change bars, etc) and it
> will be our draft for Ballot. 
> 
> I would like to use this opportunity to thank you all for the hard work
> in enabling this, and to our technical editor, Stu Sutherland, who has
> been making excellent progress and follow-up on all of our drafts. 
> 
> Enjoy, 
> 
> --- Johny. 
> 
> 

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