Hi All,
Please note that P1800 SystemVerilog Ballot draft is ready and was
uploaded (thanks to Dennis) to our web site under:
http://grouper.ieee.org/groups/1800/private/P1800-draft4_SystemVerilog_L
RM.pdf
This version is a clean draft (no colored text, change bars, etc) and it
will be our draft for Ballot.
I would like to use this opportunity to thank you all for the hard work in
enabling this, and to our technical editor, Stu Sutherland, who has been
making excellent progress and follow-up on all of our drafts.
Enjoy,
--- Johny.
Received on Mon Feb 14 08:47:53 2005
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