[sv-ac] continuous assignment example

From: Kulshrestha, Manisha <Manisha_Kulshrestha@mentor.com>
Date: Tue Dec 07 2010 - 10:22:48 PST

Hi Dimitry,

Here is the example we were discussing at the end of today's meeting:

randomization modifies the sampled value
continuous assignment modifies the sampled value
NBA does not modify the sampled value

checker c(a);
rand bit v;
bit x;
bit w;
always @clk x <= a;

assume property (@(clk) a == v);

assign w = $sampled(v & x) = v & $sampled(x);

assert property (@clk a == w);
assert property (@clk a == v);

endchecker

Just a followup on this example: when does the sampled value of x changes ? If it changes in Preponed region of next time step, then will this continuous assignment evaluate again at next simulation tick ? But perhaps there is no need to do that as value of 'w' will not be used till next clock event.

So, these continuous assignments are more like blocking assignments which happen between freevar update and assertion evaluation. Is that correct ?

Manisha

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Received on Tue Dec 7 10:23:17 2010

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