[sv-ac] Minutes from SV-AC Meeting 12/7/2010

Minutes from SV-AC Meeting
Date: 2010-12-07
Time: 16:30 UTC (8:30 PST)
Duration: 1.5 hours

Dial-in information:
--------------------
Meeting ID: 38198

Phone Number(s):
1-888-813-5316 Toll Free within North America

Live Meeting: https://webjoin.intel.com/?passcode=3901343

Agenda:
-------
- Reminder of IEEE patent policy.
See: http://standards.ieee.org/board/pat/pat-slideset.ppt

- Minutes approval

- Chair and co-chair election

- Email ballot results

- New issues

- Issue resolution/discussion
Addressing champions' feedback.

2387: Layout of 16.11 is inconsistent
          Erik to make proposals consistent.

2557: Rules for passing automatic variables to sequence subroutines are
not clear
          Erik to modify the proposal and to remove the reference.

2804: Need to clarify rule (b) in 16.15.6 to allow inferred clock when
expression appears in procedural assertion

2934: Precedence and associativity of case operator is not shown in the
table

3113: Add port_identifier to constant_primary BNF for sequences,
properties and checkers

2476: Need clarification about system functions $onehot, etc

- Enhancement progress update

3034: Allow continuous and blocking assignments in checkers
Arguments for system functions
3213: Update definition of sampled value

- Opens

Attendance Record:
------------------
          Legend:
                  x = attended
                  - = missed
                  r = represented
                  . = not yet a member
                  v = valid voter (2 out of last 3 or 3/4 overall)
                  n = not a valid voter
                  t = chair eligible to vote only to make or break a tie

Attendance re-initialized on 2010-07-06:

   v[-xxxxxxxxx-x-xxxxx--xxx] Laurence Bisht (Intel)
   v[xxxxxxxx-xxxxxxxxxxxxx-] Eduard Cerny (Synopsys)
   v[-x-xxxxxxx-xxxxx-xxxxxx] Ben Cohen
   n[----xx-x-xxx-x--xxxxxxx] Surrendra Dudani (Synopsys)
   n[x-x--xx---xxxx---x-xxxx] Dana Fisman (Synopsys)
   v[--xxxxx-xxxx-x-xxxxxxxx] John Havlicek (Freescale)
   v[xxxxxx-xxx-xxxxxxxxxxxx] Tapan Kapoor (Cadence)
   t[xxxxxx--xxxxxxxxxxxxxxx] Dmitry Korchemny (Intel ¿ Chair)
   v[xxxxxx--xxxxxx-xxxxxxxx] Scott Little (Freescale)
   v[xxxxx-xxxxxxxxx-xxxxxxx] Manisha Kulshrestha (Mentor Graphics)
   v[xxx-xxxxxxxxxxxxxxxxxxx] Anupam Prabhakar (Mentor Graphics)
   v[-xx-xxx-xx--xxxxxxx-xxx] Erik Seligman (Intel)
   v[x-xxxx--xxxxxx-xxxxxxx.] Samik Sengupta (Synopsys)
   v[xxxxx-xxxxxxxxxxxxx-xxx] Tom Thatcher (Oracle ¿ Co-Chair)
   n[-x.....................] Srini Venkataramanan (?)
     |- attendance on 2010-11-23
   |--- voting eligibility on 2010-11-30

- Reminder of IEEE patent policy.
See: http://standards.ieee.org/board/pat/pat-slideset.ppt
Participants were reminded.

- Minutes approval
Scott: Mode to approve minutes
Tapan: Second
        Vote results: 8y, 0n, 0a

- Chair and Co-chair election
  Ed: Nominates Dmitry to continue as Chair
  Samik: Second
        Vote results: 8y, 0n, 0a

  Scott: Nominates Tom to continue as co-chair
  Samik: Second
          Vote results: 8y, 0n, 0a

        
- Issue resolution/discussion
Addressing champions' feedback.

Skip over some issues since Erik is sick today

2934: Precedence and associativity of case operator is not shown in the
table

Tom: Move to approve new proposal for 2934
Scott: Second
        Vote results: 8y, 0n, 0a

- Enhancement progress update

3034: Allow continuous and blocking assignments in checkers

Manisha:
        Original Proposal: Update free vars in reactive region.
                Also update blocking assignments & continuous assignments in
                Reactive.
                Solve in Observed region, but update free vars in Reactive.
                But assume and assert referencing both a free var and a
                design variable would give different results.
        Likes the way Tom had summarized Scott's proposal.

Ed: What if we decoupled concurrent assumes and deferred assume statement.
        Make them separate
Manisha: Currently only concurrent assumes participate in the
        solving for free variables, correct?
Dmitry: No mention that only concurrent assertions participate in solving.
Manisha: No specific mention of concurrent assertions only, but language
        referrs to clocking events, pointing to concurrent assertions.
Tom: Specifically allowing concurrent assumes would only complicate
        things.
Dmitry: But might be useful, when you have no clock.
Scott: May give some ordering of solving.
Ed: We didn't define when deferred assertions would be solved.

Ed: If you separate domains so that concurrent assertion and deferred
        assertion can't reference the same free var, then it may not matter.

Scott: Makes sense to have continuous assignment occur in Reactive region
        using current values.
        Free variables: no real place to solve for them
        Possibilities:
                Solve in the next simulation tick.
                Maybe user specifies an event for solving.

Tom: Minimalist proposal: Feel that continuous assignments in checker
        need to be update in Reactive region. The only problem with this
        is when the assignment references a free variable. We could just
        dis-allow this. The user could use a "let" construct instead and
        it would work.

Dmitry: Free variables are very important. Don't want a solutions which
        doesn't take them into account.
Scott: Very counter-intuitive to use sampled values for continuous assigns
Scott: Dmitry's example: sanity assertions would not pass.
Dmitry: Example would pass, according to the rules in proposal
Scott: Rules are starting to get complicated

        Further discussion on continuous assignments within checkers.

Meeting adjourned.

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