In fact, the first thing the simulation reference algorithm in 9.3.1 does is to initialize T to 0. Shalom > 6.4 says "In SystemVerilog, setting the initial value of a static > variable as part of the variable declaration (including static class > members) shall occur before any initial or always blocks are started." > > There is no definition of "before time 0" -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Sun Jan 28 01:40:30 2007
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