Hi Manisha:
A few small nit picks...
The proposal has: "SystemVerilog provides the system task $assertcontrol to control the evaluation of assertion statements." I would prefer that system task follow $assertcontrol here as well.
- control_type: This argument controls the effect of $assertcontrol system task. This should read "the effect of the $assertcontrol..."
After the description of the $assertcontrol you have the sentence, "The effect of $assertcontrol system task" which should be "The effect of the $assertcontrol system task"
In the description of PassOff you say, "while the execution of pass action for only nonvacuous successes can be enabled subsequently by $assertcontrol with a control_type value of 10 (NonvacuousOn)." which should be " while the execution of the pass action for only"
In FailOn/Off you state, " This task also affects the execution of the default fail action block." I am confused by this clarification. Can you explain why it is needed?
Thanks,
Scott
> -----Original Message-----
> From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
> Kulshrestha, Manisha
> Sent: Tuesday, May 03, 2011 4:55 AM
> To: sv-ac@eda-stds.org
> Subject: [sv-ac] mantis 3295
>
> Hi,
>
> I have uploaded a new proposal with the following changes.
>
> 1. In 20.11, formatted list of arguments as list.
> 2. Changed the sentence "The $assertcontrol has different arguments as
> follows".
> 3. Added ',' before i.e. or e.g.
> 4. changed '==' to 'is equivalent to'
> 5. Added description of different arguments to each bullet for the
> argument and removed their description from the paragraph at the end.
> 6. Changed S_IMMEDIATE to SIMPLE_IMMEDIATE. Changed D_IMMEDIATE to
> DEFERRED_IMMEDIATE.
> 7. Changed 'system task $assertcontrol' to '$assertcontrol system
> task'.
> 8. Fixed the on/off/kill numbers from 2,3,4 to 3,4,5 in writing
> equivalents.
> 9. Fixed language at some other places based on Scott's comments.
>
> Please review and let me know if any change is required.
>
> Thanks.
> Manisha
>
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