P1076 August 25, 2011 Meeting Minutes
Attendees:
MartinThompson
*
ChuckSwart
*
JimLewis
*
DavidKoontz
*
JarekKaczynski
*
PeterFlake
*
ChrisHiggs
*
JohnShields
Agenda:
Bugzilla VHDL 201X: owners for issues
Requiremnts list new issues
Approve
August 11 Minutes
Motion * 2nd:
JarekKaczynski
*
DavidKoontz
Issues with Reflector
Chuck and David K have reported issues with reflector
Assignment of Bugzilla Feature Requests to Owners
Bugzilla IR2130:239 Ability to overload the assignment operator: = ... -- AI Jim write initial proposal
Bugzilla IR2132: 240 Method to allow functions that return arrays to ... -- AI Jim write initial proposal
Bugzilla 292 Configuration of directly instantiated entities -- Need owner
Discussion of Requirements List
Need Owner for: VHDL-2008 package generic issues in particular with packages being created in a general declarative region.
Need Owner for: Synthesizable Assertions
See requirements list and
SystemVerilog
Synthesis Proposals
Need to revive 1076.6 to address synthesis proposals.
In addition to requirements list, it would be nice to see attributes (RAM, Statemachine, ROM, ...) standardized
ISAC
Having issues getting enough people to attend
Chuck planning on retiring and will need a new champion
Officer Nominations
Currently only have one nomination. Need more.
Talk to your friends and nominate them
Action Items:
See above
Next Meeting Date (proposed):
VHDL WG: Thursday September 8, 8 am Pacific
ISAC: Proposed September 6, 6 am Pacific
This topic: P1076
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Topic revision: r4 - 2020-02-17 - 15:36:20 -
JimLewis
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