Hi, I have a little additional information. What Lance(in prior email) and Victor suggest appears to be true. Synplicity took a draft from 1364 and modified the pragma prefix to be "%%%" and used that unchanged in each of Verilog, VHDL, and EDIF. They describe a subset of the mechanism, the digital envelope with a straightforward model for managing keys. It is unclear but probable that they only have a subset of the mechanism implemented. It seems right to me to begin promoting adoption of this approach as development continues. I believe they also added some pragma's to direct tool output (e.g., synthesized or derived netlist ) to be reencrypted. Let's see what results from Victor's discussion, but it should be straightforward for them to align themselves to the standard. It would be useful to encourage them to review and give feedback on the VHDL LRM in this area, Lance. Regards, John Shields Alain Vachoux wrote: > Hi, > > Victor's reply to Arpad also bounced. I'm reposting it below. > > Best regards, > Alain Vachoux > > ----------------------------------------------------------------- > From: "Victor Berman" <vberman@cadence.com> > To: "Muranyi, Arpad" <arpad.muranyi@intel.com>, > "1076.1 mailing list" <vhdl-ams@server.vhdl.org> > Cc: "Lance Thomson" <lancet@us.ibm.com> > X-Received: By mx-sanjose.cadence.com as k5L3rVwr025296 at Tue Jun 20 > 20:53:32 2006 > X-Virus-Scanned: ClamAV 0.88/1555/Tue Jun 20 15:21:12 2006 on > server.eda-stds.org > X-Virus-Status: Clean > Content-Transfer-Encoding: 8bit > X-MIME-Autoconverted: from quoted-printable to 8bit by > server.eda-stds.org id k5L3rYDu013342 > > Arpad and All, > > I do not think that Synplicity is aware of the latest work in the > standard. I plan to talk to them in the next few days so that their > well intentioned work will conform to the our standard. > > Regards, > Victor > > -----Original Message----- > From: owner-vhdl-ams@eda-stds.org [mailto:owner-vhdl-ams@eda-stds.org] > On Behalf Of Muranyi, Arpad > Sent: Tuesday, June 20, 2006 9:00 AM > To: 1076.1 mailing list > Cc: Lance Thomson > Subject: RE: [1076.1] Information on proposed IP support in VHDL-200X > > Has anyone seen this article? > > http://eetimes.com/news/design/showArticle.jhtml?articleID=189500419 > > I wonder how this fits into the picture. I would hate to see competing > standards because it will turn everything into tool dependent, and > non-interchangeable again... > > Arpad > ======================================================== >Received on Wed Jun 21 15:16:18 2006
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