Subject: Welcome to the TBV group
From: Jayaram Bhasker (JBhasker@esilicon.com)
Date: Fri Apr 04 2003 - 10:39:57 PST
Hello:
Welcome to the TBV group. The purpose of this group is to enhance VHDL in the areas of
testbench and verification. I am the task chair for this group.
Our group details:
WG home page: http://www.eda-twiki.org/vhdl-200x/vhdl-200x-tbv
WG reflector: vhdl-200x-tbv@eda.org
Email archive: see home page.
Proposals: see home page
At present, I have a document posted with the current status of proposals (under "proposals") - not much.
What I am looking from you is:
1. Any other feature that you would like to see in VHDL as it relates to testbench and verification.
2. Proposals for features that have been requested - anyone who wants to take a leadership role here
in defining a feature is welcome to do so.
Until I can find someone to host teleconferences, most of the work would be done via email.
Welcome aboard!
- bhasker
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J. Bhasker, eSilicon Corp
1605 N. Cedar Crest Blvd, Ste 615, Allentown, PA 18104
jbhasker@esilicon.com, 610.439.6831, 610.770.9634(fax)
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