Subject: Re: [vhdl-200x-mp] Analog/Digital conversion
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Tue May 06 2003 - 09:56:44 PDT
> From owner-vhdl-200x-mp@server.eda.org Tue May 6 05:56:10 2003
>
> Kevin,
>
> > The stuff I posted earlier only pertains to digital modeling of
> > bidirectional components. The proposal is actually a subset of the
> > functionality in Verilog-AMS used to do digital to analog conversion
> > for auto-inserted convertors. Is anyone interested in adding the full
> > functionality to VHDL?
>
> Are the facilities of VHDL-AMS insufficient?
>
> Paul
Verilog-AMS was designed to allow plug-and-play of analog and digital
components such that timing could be preserved i.e. the signal propagation
time through a path of mixed analog and digital components can be the
same regardless of which architectures are used. Doing that requires that
digital events that propagate into the analog domain and back are not
artificially delayed at the digital-to-analog boundary in order to generate
a ramped voltage (or current) that the solver will tolerate, and that
requires that the boundary digital-to-analog converter (D2A) gets to
look into the future waveforms driving the digital signal.
Verilog-AMS also uses modules rather than functions to do conversions
for ports at the A/D boundary since conversion requires extra processes
(which are sensitive to driver changes and voltage/current crossovers).
Since VHDL-AMS doesn't provide access to driver waveforms or "conversion
modules" I'd say it's insufficient, but I don't think it's particularly
difficult to add that functionality.
BTW, is my understanding that VHDL does hierarchical signal resolution
correct (a signal is resolved locally and the result passed up, and
the effective value propagated back from the top)?
Kev.
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