[vhdl-200x-ft] Bit sizing in fixed point divide

> -- divide returns odd combination of widths
> ufixed(a downto b) / ufixed(c downto d) = ufixed(a-d+1 downto b+c)
> ufixed(a downto b) / sfixed(c downto d) = sfixed(a-d+1 downto b+c)
> sfixed(a downto b) / ufixed(c downto d) = sfixed(a-d downto b+c+1)
> sfixed(a downto b) / sfixed(c downto d) = sfixed(a-d downto b+c)

In numeric_std, division is sized like this:
unsigned (a downto 0) / unsigned (b downto 0) = unsigned (a downto 0)
So, what I did was to try to be consistant with the multiply rules:
ufixed (a downto b) / ufixed (c downto d) = ufixed (max(a,b) downto min(b,d))

Example:
000.001 / 100.000 = 0.00001 Current result "000.000" (underflow), proposed
"0.000001"
100.000 / 000.001 = 100000.0 Current result "000.000" (overflow), proposed
"0.000000" (also overflow).
If we automatically expand the dividend, we get:
000000.001000 / 100.000 = 0.00001, Current result "000000.000001", proposed
"000.000001000"
000100.000000 / 000.001 = 100000.0, Current result "100000.000000", proposed
"000.000000000" (overflow)

So it sounds like the old method is best. Comments?

-- 
David W. Bishop dbishop@vhdl.org       All standard disclaimers apply.