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VHDL-200x-DTA Proposals |
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Strawman proposals The proposals listed here have been suggested for consideration by the VHDL-200x-DTA group. At this stage, they should be considered as "strawman" proposals. No decision has been made about their inclusion in a future revision of the language. Object-oriented features Inclusion of object-oriented features for data modeling would enhance the language for testbenches and complex functional verification. Enhanced generics The VHDL-200x-FT revision proposes extensions to generics to include formal generic types and subprograms, and to allow for generic lists in packages and subprograms. These features can be extended to integrate with object-oriented features, by including generics on class specifications and by using class types to constrain formal generic types. Interfaces An interface is a first-class abstraction of the inputs and outputs to a design entity. It includes not only the ports, but also abstractions of operations and protocols. Dynamic processes Currently, processes are static objects, that is, they are created when a design is elaborated and persist indefinitely. Dynamic processes, on the other hand, can be created and terminated during the course of a simulation. They are useful for complex system modeling, including modeling of embedded systems that include software components. Dynamic processed might be created at a course granularity with a dynamic form of process statement. Alternatively, they might be created at a finer granulaity with fork/join constructs. Reconfigurable hardware With the increasing use of reconfigurable fabric in systems, the need arises to model dynamic reconfiguration of system behavior. Mechanisms such as dynamic process creation and termination, or dynamic instantiation and removal of component instances, may be useful for modeling such systems. SUAVE The group is reviewing the SUAVE proposal from Peter Ashenden and Phil Wilsey as a source of design ideas for extending VHDL. |
Last updated: 07-Jan-2005
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Peter Ashenden