RE: [vhdl-200x-dta] Review of: [vhdl-200x] Revised white paper on type genericity

Tim,

I'd be interested to see how you use them. Are you able to illustrate?
Thanks.

Cheers,

PA

--
Dr. Peter J. Ashenden                        peter@ashenden.com.au
Ashenden Designs Pty. Ltd.                   www.ashenden.com.au
PO Box 640                                   Ph:  +61 8 8339 7532
Stirling, SA 5152                            Fax: +61 8 8339 2616
Australia                                    Mobile: +61 414 70 9106
> -----Original Message-----
> From: owner-vhdl-200x-dta@eda.org 
> [mailto:owner-vhdl-200x-dta@eda.org] On Behalf Of Tim Davis
> Sent: Friday, 23 April 2004 23:48
> To: vhdl-200x-dta@eda.org
> Subject: Re: [vhdl-200x-dta] Review of: [vhdl-200x] Revised 
> white paper on type genericity
> 
> 
> Peter Ashenden wrote:
> 
> >Jim,
> >
> >Regarding the distinction between parameters and ports: I 
> think the ...
> >
> >  For blocks, the order is different again, but I'll
> >discount them for this argument, since block interface lists 
> are really 
> >a definitional artifact and not used by designers.
> >
> I use block interface lists.
> 
> Thanks.
> --
> Aspen Logic, Inc.
> By: Tim Davis, President
>