Re: [vhdl-200x-dta] Review of: [vhdl-200x] Revised white paper on type genericity

Steve,

In V2 of the type generics proposal, Peter has proposed
what you suggested below:

> [ generic ( generic_list ) ]
> subprogram_designator
> [ ( formal_parameter_list ) ]
> [ return type_mark ]

I realize this solves the port vs parameter issue
(which is not a big issue), however, it does introduce
a big syntax inconsistency between subprograms and
entities. I don't like this at all.

Note in V1, the parameter keyword was optional and that
all I had to do to gain some degree of consistency
(in MP) is to make the keywords port and port map optional.

Come ballot time, I will support the syntax the group agrees to,
however, I think for now we need to solicit/encourage discussion
of this as I think the syntax is potentially controversial and
I don't want to see the ballot delayed.

If we adopt the V2 syntax, in MP I will need to consider if
we should give entities the optional ability to specify
generics first in order to give consistency with the subprogram
syntax.

Cheers,
Jim

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Jim Lewis
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