Re: [vhdl-200x] interface proposals

From: Brent Hayhoe <Brent.Hayhoe@Aftonroy.com>
Date: Mon Nov 23 2015 - 11:26:18 PST
Hi Tristan,

On 22/11/2015 11:40, Tristan Gingold wrote:
> On 22/11/15 11:56, Brent Hayhoe wrote:
>> Some thoughts:
>>
>> -- So this is the Ada 'discriminated record' type that I presume we are
>> -- discussing. The way it looks to me is just a 'constant generic'
>> applied to -- the record type:
>>
>> type Discriminated_Record (Size : Natural) is
>>     record
>>        A : String (1 .. Size);
>>     end record;
>>
>> -- So if I VHDL'asize this we could have a generic block preceding the
>> record
>> -- block in the type declaration.
>>
>> -- We then need to 'generic map' the 'Size' value through when we declare a
>> -- constant and signals:
>>
>> type MyRecType is
>>     generic(
>>        Size : Natural
>>     );
>>     record
>>        A : String (1 to Size);
>>     end record MyRecType;
>
> Isn't this a little bit overkill given that it is already possible
> to have unbounded arrays as record elements ?

Not if you want to do something like:

entity MyEntity is
    generic(
       Size : Natural := 10
    );
    port(
       IP : in  MyRecType generic map(Size);
       OP : out MyRecType generic map(Size)
    );
end entity MyEntity;

You could decompose the records at the port, but with bigger record structures 
this will become very cumbersome.


>> constant MyRecConst  : MyRecType generic map(10) := (A => "0123456789AB");
>
> I suppose this results in an error when elaborated ? :-)
>
> Tristan.


-- 

Regards,

         Brent Hayhoe.
Received on Mon Nov 23 11:26:29 2015

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