I wrote to_stdulogic and to_stdulogicvector functions for these, and can share them if there's a place for me to deposit the source. [MJT] Feel free to send me a pull request to my random collection of VHDL functions here if you like: https://github.com/martinjthompson/libv Cheers, Martin -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Apr 16 06:01:42 2015
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