RE: {Spam?} Re: [vhdl-200x] VHDL-2008: Records and aggregates

From: Lehmann, Patrick <patrick.lehmann@tu-dresden.de>
Date: Wed Apr 15 2015 - 02:57:45 PDT
Hello,

Sorry I was not aware of that it's possible to use range
> type myRange is RANGE 7 downto 0;
without any integer type/subtype or similar.

Any other suggestions to declare a pure range? Or alternatively, any 
suggestions to
use integer type/subtype definitions as a range in slices and aggregates?

Regards
    Patrick


-----Original Message-----
From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of 
tgingold@free.fr
Sent: Wednesday, April 15, 2015 9:22 AM
To: vhdl-200x@eda.org
Subject: {Spam?} Re: [vhdl-200x] VHDL-2008: Records and aggregates

> I think it would be nice to have a type RANGE that defines some
> operations like add/sub/div/mult of length or shift of boundaries.
>
>
> Example definition:
> type myRange is RANGE 7 downto 0;

Sorry, but this syntax is already used to declare an integer type !

Tristan.

--
This message has been scanned for viruses and dangerous content by 
MailScanner, and is believed to be clean.




-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
Received on Wed Apr 15 02:58:10 2015

This archive was generated by hypermail 2.1.8 : Wed Apr 15 2015 - 02:58:44 PDT