Re: Reminder: [vhdl-200x] Prioritizing Requirements

Hi Jim,

That is a depressingly low number of contributors and I know I am partly 
to blame.

I find it worrying that there is such a lack of interest although I 
suspect this is mainly because most high-end verification engineers use 
(or are forced to use) SV or SC and hence their requirements are not 
passed on to this group.

As I have not been involved in most of the discussions I would fill in 
the priority sheet using the following criteria:

- Vote for enhancements which helps to take OS-VVM closer to the UVM 
level (e.g. OOP style features)
- Vote for enhancements which makes the language more powerful and which 
can't be done with a bit of code or a package
- Vote for enhancements which helps to promote integration with PSL

My personal (short) wish list would be:
- 64 bits Integers
- Bidirectional records
- Preprocessor (with # and not the ` symbol)
- Shared variables

I will fill in the list and will send it to you later this evening,

Regards,
Hans.


On 09/12/2014 00:42, Jim Lewis wrote:
> Hi,
> I have received priority sheets from:
>   David Bishop
>   Kevin Jennings
>   Martin Thompson
>   Radoslaw Nawrot
>   Tristan Gingold
>   Jim Lewis
>
> If you sent one and your name is not on this list, for some reason, I 
> did not receive it.
>
> Yes it is a long sheet.  Yes we will still accept them.   Having more 
> user input in particular
> is important.   So even if you do not participate in the meetings or 
> discussions frequently,
> having input from you is helpful.
>
> Thanks,
> Jim


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