Re: resolved integers (was RE: [vhdl-200x] Update to proposal for arbitrary integers)

Hi,
In a way, VHDL-2008 added two resolution functions for types integer, real, and time.  They are called maximum and minimum.  :)

To get see this, consider that a resolution function requires up to 2 policies:
1)  How to choose a final value.
2)  [optional] What should be done if there is more than one active value.

Addressing how to choose a final value, one can
* Pick maximum, pick minimum, pick the sum of values, pick first or last value (not symmetric)

Addressing what should be done if there is more than one active value, one first has to arbitrarily pick a non-driving value.  If you think back to wired-or buses, then picking 0 as a non-driving 
value becomes obvious.  One policy would be to require all signals to be given an initial (default) value of 0, 0.0, or 0  ns, as is appropriate for the type and then if there is more than one 0, 
issue an error and/or failure message.

I have been using resolution functions for integer, real, and time for quite some time now (since 2006).    I have been using ones that signal an error if more than one value is non-zero and pick the 
last value.  I don't think last value is a good policy and intend to replace it with maximum.  I have also played around with using a summing resolution function (this is the original example that I 
saw that helped me see how resolution functions could work for type integer), however if you have a set of ranged values, then summing could produce a value out of range (hence, if you had a failure, 
it would make it harder to continue and get debugging information out of your session).

To create a resolution function,
* You need an array of the type.  Conveniently VHDL-2008 defined integer_vector, real_vector, and time_vector.
* You need a function that inputs the array of the type and returns the type.  So the signature is A [integer_vector return integer]. VHDL-2008 defines both a maximum and a minimum that meet this profile.
* [optional] You can create a resolved subtype.  Ok so VHDL-2008 did not do this one, however, if you pick long names, then this step adds no value.

To use maximum or minimum as a resolution function (caution, one version of a VHDL simulator has a bug (reported some time ago) in this area), you can do the optional step:

subtype resolved_maximum_integer is maximum integer ;

signal A : resolved_maximum_integer ;

The reason I said this step is no value is that one can also do the following in all contexts where resolution functions are necessary:
signal A : maximum integer ;

Cheers,
Jim

On 10/14/2014 5:09 AM, Martin.J Thompson wrote:
>
> *From:*owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] *On Behalf Of *David Bishop
>
> A “NaN” is a very specific value for a floating point number.   An exponent of all “1” (which means infinity) and a fraction which starts with a “1”.     Since all of the bits in an 
> integer are valid, I don’t know how you would do an invalid number.   You can’t just pick one because somebody will need to use it.
>
> I agree – if you want an ‘undriven value’, then it has to be separate.  The simulator could track it in whatever softwarey way suits, say via an internal variable with a bit for each resolved 
> integer object which needs to be tracked. In synthesis, a resolved integer could an extra bit to signifiy its “drivenness”.
>
> Or either level of tool could allocate a value outside of the valid range for the integer in question (to use internally as a flag), which could be accessed through the language via some suitable 
> abstraction.
>
> At this stage, I would propose that Daniel could write up a requirement on the Twiki for what he would like to happen (without implementation details at this stage?) and we can add it to the future 
> discussions...
>
> *Cheers,*
>
> *Martin*
>
>
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Jim Lewis                                  Jim@SynthWorks.com
VHDL Training Expert                       http://www.SynthWorks.com
IEEE VHDL Working Group Chair
OSVVM, Chief Architect and Cofounder
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