Le 2014-08-08 13:20, Peter Flake a écrit : > I think that the most common functional requirements for modular types > can > be met by bit_vectors, since in most cases the modulus is a power of 2. I agree that bit_vector provides many of the desired features. However, that's "wishful thinking" : it won't happen because it hasn't happened already. "Tools implementors" are "followers" and have a herd mentality. They also follow their users while influencing them through what they don't support. If the VHDL standard chooses to follow the tools that follow it, it enters in a vicious circle and nothing ever gets done. And nobody ever wins at a blame game. Furthermore, bit_vector will not be "optimised" by implementors because std_logic_vector is the de facto type. Increasing bit_vector's simulation efficiency will not affect real code. I believe that the new modular type brings the best of both worlds. * being an actual "number" it is implemented naturally as a (multi-word) integer so it's fast to simulate, probably even using less memory. * being inherently "modular", it makes boolean operation safe (which is not easy to solve if we just slap and/not/shl/etc. on the native integer type) * With the full set of operations (arithmetic/boolean/etc.) it becomes possible to do emulation. * Hopefully, it should be possible to have a syntax as close to std_logic_vector as possible. This way, until tool implementors support the newer modular type, developers can use the same single source file to simulate, emulate and synthesize, they just need to swap the modular type for std_logic_vector (that is currently supported). The only limit I have found with the modular type is the use of indices/ranges/vector syntax. As in other languages, substitute with shifts, masks and well-chosen modulos... > The challenge is that the numeric_bit library is not fast enough. > Tools > need to provide the optimizations described by David. This won't ever happen because nobody has the power to coerce them. If you want this to happen, you need a very interesting incentive, it must be a game changer, and provide many benefits. I have the feeling that bit_vector is obsolete... The modular type seems to have more potential, it's more "abstract"-looking (good for higher-level description) while decently fast, and it maps easily to wire-level types (if we get the syntax right so it can substitute std_logic vector in the interim). > Peter Flake YG -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Aug 8 06:03:18 2014
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