Re: {Spam?} Re: [vhdl-200x] Image attribute for array types

From: <>
Date: Wed Jul 23 2014 - 00:12:23 PDT
> 'Image already exists for scalars.  Why leave out composite types?
>  And that's the real question I'm trying to ask -- it's not
> rhetorical.  And I take your formatting objection seriously -- if we
> can't find a natural format for the result, it may be better not to
> define it at all.  I think the VHDL aggregate syntax is easy to
> produce, easy to parse (for 'value), and natural to any designer who
> uses these types.
> What do you think?

I think there is no natural and usable output format.  A soon as the
type is too complex (record of records), the output would be very
long and therefore unreadable.

Pragmatic, I am not opposed to extend to_string to one-dimensional
array of scalar types, using string representation if the element
type is an enumerated type only of characters (so that the output
would be nice for bit vectors and std_logic vectors - but note that
to_string for a string won't be the identity) and positional aggregate
like format for other element types ('like' because there is no
positional aggregate for less than two elements).

[ I also think the priority must be fixing issues in the current LRM.
 (For example I am not sure visibility rules are correct)].


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Received on Wed Jul 23 00:12:55 2014

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