Re: [vhdl-200x] Image attribute for array types

On 23 Jul 2014, at 6:28 am, Jim Lewis <Jim@synthworks.com> wrote:

> My only point in noting your non-LRM short cuts is that they are natural to do and if you really want to use 'image then you might want to make that a proposal.

records of records of records, ..., oh my!

Why is it you don't have printf type string conversion formats for entire structures or unions in the C programming language?  You could note Ada doesn't generate image strings for values of non-scalar types either.

It boils down to no one actually needing an entire (and potentially almost unlimited) record or array image on a single line or as a single string.  

Making something simple to use is encouraging it's use without regard to the actual 'cost'.  Sort of like multidimensional arrays going to waveform dump files.

The pain of expressing all those record elements by individual image conversion makes a nifty reminder not to do something dumb. For those burdened by that perhaps a smarter text editor is in order instead of gumming up the language.  

Or can someone figure out how to place meaningful limits when you've expressed the ability to 'image a record type that can contain elements of record types?

Even an array type can suffer from image string length accumulation.  A string can have a natural length, a quarter of the character values have multiple character enumerations (non-printable   characters or graphic characters that are format effectors).  Not to mention Ryan's proposed string length expansion:

> -- Will print "('0','1','1')" according to my suggestion.


Which will increase the length associated with printable graphics characters three fold.

   variable a: std_logic_vector (0 to natural'high/4) := (others => '0');
   ...
   a'image  -- (It was those opening and closing parentheses)

would run out of string length and there aren't any VHDL standard defined error messages to get the point across to the neophyte VHDL user.

We had someone actually do a natural range std_logic_vector recently, and it spawned all sorts of new (previously missing) diagnostics in a couple of open source VHDL tool implementations.  It's legal in VHDL just like record elements that are record types. 

I think a proposal may be in order for either package or attribute implementation.  And if you can't make it workable as a function in a package it's probably not going to be useful as an expansion to the 'image attribute. 

And ya, the design specification would ugly as all get out, but I think it's doable with present predefined attributes. 

While I don't mind someone getting frustrated after being inspired to encode an entire database into a record hierarchy the implementation might at least owe some meaningful diagnostics instead of simply an error notice and a line number when trying to express that record hierarchy (or long array) as a string.

Monitoring the length would complicate the package function somewhat but likely beats the heck out of trying for a standardized error message (of which VHDL has none to date) for the 'image attribute.

I'm personally skeptical of doing a 'image attribute on things that can't be expressed in a string when the language allows the type declaration. Your simply serving a subset of the potential uses.  There is no similar limitation elsewhere which sort of screams scalar limitation.

And if you do give it to them, next will be 'VALUE (a natural symmetry).



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