RE: EXTERNAL: Re: [vhdl-200x] Modular types

I can't recall how we got onto bignums from modular types, but my feeling is that they are separate issues (they're certainly separate proposals!)

Cheers,
Martin

-----Original Message-----
From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of Evan Lavelle
Sent: 01 July 2014 12:50
To: vhdl-200x@eda.org
Subject: Re: EXTERNAL: Re: [vhdl-200x] Modular types

On 01/07/2014 12:00, Martin.J Thompson wrote:

> Many VHDL users have wanted >32 bits for their ints, and the proposal 
> is that instead of just saying 64-bits will be enough, to not limit 
> things (much as Python doesn't limit you either).
>

I'm all in favour of bignums, and I've done a compiler bignum implementation myself (not VHDL, and no exponentiation; 4-state bignums for "logic", 2-state for "integers"). Existing simulators should essentially already contain something very similar, and the work involved in exposing a 2-state interface should be small. When you're writing a compiler from scratch, it's trivial and obvious to use the same infrastructure for vectors and big integers.

My concern was more with modular types, which seem to me to have little benefit for what looks like significant complexity.


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