RE: [vhdl-200x] Iterating across a Record Type

From: Martin.J Thompson <Martin.J.Thompson@trw.com>
Date: Thu Jun 05 2014 - 01:05:45 PDT
Daniel,

Do these proposals not meet your needs?

http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/RecordMemberAttribute

http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/RecordIntrospection



The latter one provides “for element in record_type'elements loop“ which looks like it would work for you?



Cheers,
Martin

From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of Daniel Kho
Sent: 05 June 2014 05:15
To: vhdl-200x@eda.org
Subject: [vhdl-200x] Iterating across a Record Type

Hi friends,
I know this question has been asked before in some forums, but I feel it hasn't been adequately answered. My intent is to loop across all elements of a record type, similar to how we could do it with an array:
for i in vect'range loop
    vect(i)<=i;
end loop;
where "vect" is an array vector of naturals for example.
The question is, if I had a record type with several sub-elements, how would I be able to iterate across all the sub-elements? For example, assume we have a record:
type rec is record
    a:std_ulogic;
    b:std_ulogic_vector(15 downto 0);
    c:signed(7 downto 0);
end record rec;
I prefer to not have to write out all the sub-elements individually:
function resolve(r:rec) return rec is begin
    if is_x(r.a) then ... end if;
    if is_x(r.b) then ... end if;
    if is_x(r.c) then ... end if;
end function resolve;
Currently, I feel having an option for iterating across record structures will be very useful especially when writing resolution functions, but I believe this usefulness can be applied to many other scenarios as well. Another application I can think of which makes having such a feature useful, is to apply them for initializers.
Some languages (e.g. scripting languages) have something like "child" or "next" keywords which we can use to access neighbouring elements of a structure. I was thinking of having something like this for VHDL:

function resolve(r:rec) return rec is begin
    for i in r'range loop    -- okay, 'range only works for arrays now,
                                   -- but you get the idea.
        if is_x(r.child(i)) then ... end if;
    end loop;
end function resolve;
Of course, "child" may as well be some other keyword, e.g. "element", or picked from a suitable existing VHDL keyword.

Best regards,
Daniel

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Received on Thu Jun 5 01:06:12 2014

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