Re: [vhdl-200x] RFC: std.textio.OUTPUT ?

From: Brent Hayhoe <Brent.Hayhoe@Aftonroy.com>
Date: Mon Jan 21 2013 - 12:58:24 PST
Jim,

I'm afraid I have to disagree!

It's not 'much closer to APPEND_MODE' - it is APPEND_MODE ;-)

+ another one

Brent.




On 21/01/2013 18:08, ryan.w.hinton@L-3com.com wrote:
> +1 for me.
>
> ---
> Ryan Hinton
> L-3 Communications / Communication Systems West
> ryan.w.hinton@L-3com.com
>
>
> -----Original Message-----
> From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf
> Of Jim Lewis
> Sent: Monday, January 21, 2013 10:55 AM
> To: VHDL-200x
> Subject: [vhdl-200x] RFC: std.textio.OUTPUT ?
>
> Hi,
> The definition of the file OUTPUT, does not seem consistent with its
> implementation.  std.textio defines OUTPUT as follows:
>     file OUTPUT: TEXT open WRITE_MODE is "STD_OUTPUT";
>
> Based on the way it works it seems to be implemented as:
>     file OUTPUT: TEXT open APPEND_MODE is "STD_OUTPUT";
>
> For WRITE_MODE, the LRM says:
>     If the value supplied to the Open_Kind parameter is WRITE_MODE,
>     the access mode of the file object is write-only. In addition,
>     the external file is made initially empty. Values written to
>     the file object are placed in the external file in the order
>     in which they are written.
>
> For APPEND_MODE, the LRM says:
>     If the value supplied to the Open_Kind parameter is APPEND_MODE,
>     the access mode of the file object is write-only. In addition,
>     the file object is initialized so that values written to it
>     will be added to the end of the external file in the order in
>     which they are written.
>
>
> Based on this, when a simulator writes to the file OUTPUT, it should
> first empty the file/transcript window.  Its behavior is much closer to
> APPEND_MODE.
>
> I think simulators are doing the correct action and suggest that this is
> resolved by changing the definition of the file OUTPUT to use
> APPEND_MODE.
>
> Comments?  If others agree, then this needs to be entered as an ISAC
> issue.
>
> Best,
> Jim
> --
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Jim Lewis
> Director of Training             mailto:Jim@SynthWorks.com
> SynthWorks Design Inc.           http://www.SynthWorks.com
> 1-503-590-4787
>
> Expert VHDL Training for Hardware Design and Verification
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
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-- 

Regards,

         Brent Hayhoe.

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Received on Mon Jan 21 12:59:01 2013

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