[vhdl-200x] Support for Register Address Descriptors: Was: Support for hex, ....

From: Jim Lewis <Jim@synthworks.com>
Date: Thu Dec 20 2012 - 07:07:37 PST
Hi All,
What I would really like to see for this is a common
descriptor file that defines the address, number of
bits, and read/write capability of a register that
can then be processed into a ".h" file for c programmers
and one or more packages for the VHDL development team.

In addition, with the right sort of information in the
packages, it would seem that the testing of our
register space of our design should be able to be
handled in a standardized way.

I am fairly certain SystemVerilog has done something
like this.  It would be nice to have a corresponding
capability for VHDL.

Best,
Jim

> Hello,
>
> currently VHDL doesn't seem to support a construct which allows the usage of hex numbers instead of integer numbers. For example sometimes I encode my addresses like this:
>
> CONSTANT
> 	C_ADDRESS_WIDTH
> 		: integer := 4;
>
> CONSTANT
> 	C_READ_DATA
> 		: unsigned(C_ADDRESS_WIDTH - 1 DOWNTO 0) := to_unsigned(1, C_ADDRESS_WIDTH);
>
> it would be nice if I could write it like this or something similar:
>
> CONSTANT
> 	C_ADDRESS_WIDTH
> 		: integer := 12;
>
> CONSTANT
> 	C_READ_DATA
> 		: unsigned(C_ADDRESS_WIDTH - 1 DOWNTO 0) := to_unsigned(0x1, C_ADDRESS_WIDTH);
>
> This way if I have to adjust the address width there would be just one position in the code which I would have to modify. The hexadecimal coding would be more in line with the address encoding the microcontroller programmers use. Other suggestions would be welcomed though.
>
>
> Best regards
> i.A. Martin Stolpe
>
>
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-- 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training             mailto:Jim@SynthWorks.com
SynthWorks Design Inc.           http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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Received on Thu Dec 20 07:08:30 2012

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