Hi Martin, This is the classic C programming fork/join model to concurrent execution. We are looking for a use model that justifies adding something like fork-join to VHDL. Many of the use cases are for actions that are independent, but need to be synchronized upon completion. Generally for these type of things, I use a separate process for each independent interface/thread. What I think we need to do is to classify different concurrent communication methods and create synchronization procedures for them. I have some of these in my testbench utilities package. interface1_thread : process begin procedure_1(..., value, signal_a); -- execute procedure and return immediately BarrierSync(thread1_2) ; ... end process ; interface2_thread : process begin procedure_1(..., value, signal_a); -- execute procedure and return immediately BarrierSync(thread1_2) ; ... end process; So we are still looking for the use model where we need to use fork/join with a concurrent language. I suspect it may occur in an interface that supports both normal and split transactions. Just have not looked into it enough yet. Best, Jim > Hello, > > during simulation I wanted to do something like this: > > process > procedure_1 (..., > signal value_proc: in integer, > signal signal_a_proc: out integer) > is begin > ... > wait for 10 ns; > signal_a_proc <= value_proc; > ... > end procedure_1; > > procedure_2 (..., > signal value_proc: in integer, > signal signal_b_proc: out integer) > is begin > ... > wait for 20 ns; > signal_b_proc <= value_proc; > ... > end procedure_2; > begin > -- execute the following two lines in parallel > procedure_1(..., value, signal_a); -- execute procedure and return immediately > procedure_2(..., value, signal_b); > -- end parallel execution > wait; > end process; > > In this example I have defined two procedures. These procedures could set some signals following a certain timing. Now assume that the timing of the signals set by the two procedures are interdependent. So what I want to do is for example to start the two procedures at the same time, or to start the second procedure a specified time after the first procedure while the first one still hasn't finished exectuion. > > I'm not aware of a construct in VHDL which would allow this behavior. Could this be something which can be considered for a future standard of VHDL or would such a construct have too many unwanted side effects? > > > > Best regards > i.A. Martin Stolpe > > > ---------------------------------------------------------------------------------------------------------- > > Systemingenieur > R&D Smart Embedded Systems (SW) > > NewTec GmbH > System-Entwicklung und Beratung > Heinrich-von-Stephan-Str. 8B > D-79100 Freiburg > > Telefon : +49 (0) 761 21117-40 > Telefax : +49 (0) 761 21117-41 > email : martin.stolpe@newtec.de > web : http://www.newtec.de > > ---------------------------------------------------------------------------------------------------------- > Geschäftsführer: Johannes Werbach, Harald Molle, Ulrich Schwer, Michael Tröscher > Registergericht: Memmingen - HRB 7236 USt.-IdNr. DE130850199 > ---------------------------------------------------------------------------------------------------------- > > > -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787 Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Nov 13 09:47:40 2012
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