This has been a great discussion. However, I was out for a while and now
find myself unable to parse all the messages that have transpired. Could
someone send out a summary of the proposed syntax/semantics so the chain
can converge at a new point?
From: Jim Lewis <Jim@synthworks.com>
To: vhdl-200x@eda.org
Date: 08/24/2012 10:59 AM
Subject: Re: EXTERNAL: RE: [vhdl-200x] Records with directional
subtypes
Sent by: owner-vhdl-200x@eda.org
On 8/24/2012 2:14 AM, john.aynsley@doulos.com wrote:
> The resolved subtype serves to identify the resolution function, which
is not called until run-time. Some implementations only report unresolved
signals with multiple drivers at run-time. There is now
> a proposal to include mode info in subtypes. FWIW I think this is dirty.
>
> I am in line with the folks who want to "package up" mode info for
record elements so it can be re-used by name, rather than being repeated
as records propagate up and down the hierarchy. How about we
> declare the modes in some totally new kind of thing that can be declared
in a package and then called out by name?
If the compiler folks can make the named mode happen,
that would be my preference too. Peter expressed concern
about this in the context of port declarations.
Jim
-- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Jim Lewis Director of Training mailto:Jim@SynthWorks.com SynthWorks Design Inc. http://www.SynthWorks.com 1-503-590-4787 Expert VHDL Training for Hardware Design and Verification ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Aug 24 09:17:57 2012
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