RE: [vhdl-200x] conditional compilation proposal

It is not a proposal, just a discussion. I'm only pointing out that there
are language based solutions that handle common conditional compilation use
cases.

As far as sequential if statements are concerned, there is no need for new
keywords or semantics. You could merely define what a static if statement
is, and require that static if's be collapsed.

--Scott

> -----Original Message-----
> From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On
> Behalf Of Evan Lavelle
> Sent: Wednesday, August 17, 2011 9:31 AM
> To: vhdl-200x@eda.org
> Subject: Re: [vhdl-200x] conditional compilation proposal
>
> On 17/08/2011 13:33, Scott Thibault wrote:
>
> > No a sequential generate is not necessary. As you pointed out, the
> > existing sequential if statement is suitable for that purpose. The
> > only thing necessary for that is a defined function.
>
> I did *not* point out that an if statement is suitable for that purpose,
and it is
> not suitable, by any stretch of the imagination. A *new* "static if" might
be
> considered by some as suitable for that purpose, as I have pointed out in
> detail elsewhere, with the issues that I have also pointed out in detail.
Your 'if
> defined()' construct could be construed to have the same semantic meaning,
> but only if "if defined" or some equivalent becomes a reserved word, and
> the argument is required to be static. Simply using 'defined' as a
function
> name doesn't do it.
>
> Your proposal - if it actually is a proposal - is that conditional
compilation
> should be handled by a combination of *3* features: the existing
concurrent
> generate, a new "declaration generate", and a new mechanism to test static
> expressions inside sequential code.
>
> -Evan
>
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