RE: [vhdl-200x] Problems with 2008 VHDL packages.

From: Shields, John <John_Shields@mentor.com>
Date: Thu Apr 21 2011 - 09:06:37 PDT

Hi,

There is a conceptual model for local packages to limit visibility of
declarations. There is a use case for a package in the declarative
region of a process that allows one to use a simple process variable vs
a shared variable and a protected type. The package achieves its
encapsulation of methods to accomplish a task and can apply it to local
data. It is simpler than a protected type model.

I expect more could be said about the basis for this in the language
design. Even if you assume so,that does not have the same impact as
practical use cases arising from it. The value proposition for the
feature will be improved or not by such practical use cases. Examples
demonstrate value that one has to otherwise infer from the theory behind
a feature.

It is very unfortunate that allowing this in all declaration regions
happened. The regularity in the language design allows for it cleanly
from a definitional perspective. Regularity is nice. However,
understanding the implementation overhead and performance of it in
subprogram declarative regions was not understood.

The language design did not consider the distinction between static and
dynamically elaborated ones and its ramifications. It is what happens
when prototype implementations do not exist to validate design. That is
the reality of the way we build consensus on this language standard.
(and many EDA standards evolve that way today).

I agree with the points here. Identifying use cases for the mechanism
or lack thereof, coupled with today's understanding, could lead to
changes, including restrictions to this feature, being proposed by this
group for the next language revision.

In that spirit, I propose that local package declarations be restricted
to statically elaborated declarative regions only in the next revision
of the language.

Regards, John

-----Original Message-----
From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf
Of Swart, Chuck
Sent: Wednesday, April 20, 2011 6:45 PM
To: vhdl-200x@eda.org
Subject: [vhdl-200x] Problems with 2008 VHDL packages.

I have spoken with several of our Model Tech VHDL-2008 implementors
about generic packages and, especially, packages which
are declared as declarative items inside other declarations. We see
little use for this generality and we believe that the implementation
cost is not worth the marginal benefit.

Upon reflection, I can almost visualize one practical use case. Suppose

that a third party wants to supply commercial IP. He may have packages
which he would like to keep private. If his design is monolithic he
could put his package inside the entity and could therefore hide it.
However,
if his design consists of multiple entities, I don't see any reasonable
way to hide it by where it is declared (he can hide it by encrypting
it). And if
his design contains only one entity, then he might as well put the
package declarations directly in the entity.

Packages in "static" structures like entities, architectures, nested
within packages, etc. may or may not be useful, but packages declared in
subprograms, which are dynamically elaborated, are very expensive. In
general, they must be created every time a subprogram which declares it
is called and destroyed
every time that subprogram is exited. I can't think of a single use case

that can benefit from this generality.

We at Model Tech do intend to implement this feature (unless there is a
decision by the standards group to drop this generality) but it will be
a very low priority.

I would be very interested to hear of any use cases which benefit from
such packages.

Chuck Swart

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
Received on Thu Apr 21 09:12:11 2011

This archive was generated by hypermail 2.1.8 : Thu Apr 21 2011 - 09:12:30 PDT