Re: [vhdl-200x] VHDL enhancements wish list

From: Martin.J Thompson <>
Date: Fri Feb 18 2011 - 08:15:14 PST

> For asynchronous signals within a clocked process, I was thinking of the
> following. We just need to specify an "asynchronous block" within such a
> process, and everything else outside of the block should be synchronous to
> the rising/falling edge of the clock:
> *process*(clk'*rising*, rst) *is*
> *begin*
> --something here to tell the compiler that these signals should be
> asynchronous.
> --I was thinking that specifying an asynchronous block should suffice:
> *asynch begin*
> *if *rst='1' *then *q<='0';
> *end if*;
> *end asynch*;
> --everything else outside of the "asynch" block should be synchronous to
> clk'rising.
> q<=d;
> *end process*;

How is this much different from the standard template? It doesn't look like a compelling improvement (to me)...

BTW, what's with all the * characters?


Martin Thompson CEng MIET
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Received on Fri Feb 18 08:15:54 2011

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