RE: [vhdl-200x] VHDL Meeting: January 10 at 8 am Pacific

Hi All,

There are IEEE encryption pragmas in 1076-2008 that are aligned with those in 1800. The "synplicity pragmas" are something done prior to those standards and just a proprietary solution. David is right in his terminology, but P1735 has developed a small set of recommendations that correct problems with the IEEE standards. The members of P1735 voted unanimously to accept them. Tools in the industry are following them voluntarily and they are interoperable. They will be in the eventual 1735 standard and some aspects are factored such that they properly belong in the HDL LRMs. It is a goal of P1735 to bring those to P1076 and P1800 working groups. When this group is ready, we can talk about the details.

I had stated in the first meeting of this study group that making changes to the LRM to align it with P1735 was one of the must-haves for the next revision of 1076. I still believe that and expect we will do it, too. I don't imagine this is at all controversial; it is just work.

Regards, John

-----Original Message-----
From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of David Smith
Sent: Tuesday, January 11, 2011 9:14 AM
To: vhdl-200x@eda.org
Subject: RE: [vhdl-200x] VHDL Meeting: January 10 at 8 am Pacific

Please remember that no one can currently support P1735 since it is a working group and not a standard.

Regards
David

David W. Smith
Synopsys Scientist
 
Synopsys, Inc.
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-----Original Message-----
From: owner-vhdl-200x@eda.org [mailto:owner-vhdl-200x@eda.org] On Behalf Of hans@ht-lab
Sent: Tuesday, January 11, 2011 1:36 AM
To: vhdl-200x@eda.org
Subject: Re: [vhdl-200x] VHDL Meeting: January 10 at 8 am Pacific

Hi Charles,

----- Original Message -----
From: "Charles Gardiner" <gardiner.charles@vdi.de>
To: <vhdl-200x@eda.org>
Cc: "Jim Lewis" <Jim@synthworks.com>
Sent: Monday, January 10, 2011 7:43 PM
Subject: Re: [vhdl-200x] VHDL Meeting: January 10 at 8 am Pacific

> Hi Jim,
>
> luckily your meeting minutes haven't arrived yet so maybe I have a chnace to
> put
> in one more point I forgot at todays telco.
>
> Could you also put "Native language support for IP encryption (P1735?)" on the
> list? Encryption has been addressed with the most recent VHDL spec but I would
> like to make sure that VHDL is in sync with what P1735 ae doing.
>
> I already find this a very useful feature for giving customers try-before-buy
> solutions. At least Aldec provide a perl script for encrypting and the
> compiler/simulator can read the encrypted files.
> However, I think this is
> currently restricted to a synplicity 'industry standard' encryption which
> might be
> a bit behind or different to what the P1735 are doing.

Just for completeness, Mentor's Precision also supports the P1735 standard as
does Modelsim. You are right that there is no full support (Precision supports
an early draft version) but I don't believe we have to be concerned about P1735
since there is already a lot of pressure to get full support for it.

The current problem (correct me if I am wrong) is not the simulator/synthesis
tools but P&R since the netlist out of synthesis into P&R is still unencrypted
which defeats the point somewhat.

Regards,
Hans.
www.ht-lab.com

> I would see this firstly as
> a point for review and action only required if necessary.
>
> --
> Best regards,
> Mit freundlichen Gruessen,
>
> Charles
>
> -------------------------------------------------------------
> Ing. Buero Gardiner
> Heuglinstr. 29a
> D-81249 Muenchen
>
> Email: mailto:gardiner.charles@vdi.de
> Phone: +49 89/1400 6955, Mobile +49 171/867 2732
> Fax : +49 89/8638 9764
>
> asic, eda, embedded hw/sw, fpga
> soc, system verification
>
> --
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