Re: [vhdl-200x] Call for Vote on Group Organization and PAR

From: Sudeep Kumar <sudeepts@gmail.com>
Date: Sun Dec 19 2010 - 22:31:45 PST

I Approve the Vote in favor of the Organization.

On Sat, Dec 18, 2010 at 3:18 PM, Jim Lewis <Jim@synthworks.com> wrote:

> Dear colleagues,
> This is a call for vote from IEEE P1076 study group members.
> Since we have had no previous votes for this revision, all
> people (individuals or corporations) on the VHDL-200X
> reflector are eligible to vote.
>
> Please forward votes to me by email (eg, by replying to
> this message) by 5pm US-PDT, Wednesday 5 January, 2011.
>
> Best Regards,
>
> Jim Lewis
> P1076 Study Group Chair
>
>
> Item 1: Working group organization, select one:
> ___x_____ Individual
> ________ Corporate
> ________ Abstain
>
>
> Item 2: 1076 PAR:
> http://www.eda-twiki.org/vasg/p1076_2014_draft_par.pdf
> _____x___ Approve
> ________ Negative
> ________ Abstain
>
> Comments (optional with negative vote):
>
> That we should work towards keeping Vhdl Alive, and make it competative,
> as Jonathan mentioned, we need to have all the system verilog
> capabilities,
> Along with the features what he mentioned, we need to include some others
> as well like
>
> 1. Mailboxes,
> 2. Semaphores,
> 3. Fork join statements.
> 4. Assertions,
>
> and Etc, and and keeping the vhdl advantages and can think of some more
> other features,
> which can Give Vhdl an Edge over System Verilog.
>
> --
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> Jim Lewis
> Director of Training mailto:Jim@SynthWorks.com
> SynthWorks Design Inc. http://www.SynthWorks.com
> 1-503-590-4787
>
> Expert VHDL Training for Hardware Design and Verification
> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
> --
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>

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Received on Sun Dec 19 22:32:07 2010

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