Hello,
The Fixed point package in VHDL 2008 takes the assumption that the
ranges will always be "downto" and positive range will be treated as
integer portion and negative ranges as fractional portion. However
according to LRM, the string literal "01010" will be assigned range from
integer'low to integer'low + 5.
So the usage of string literals along with ufixed/sfixed as in following
examples could lead to null ranges and hence potential design issues
which rtl designer didn't intended.
1) `if out1 = "0111" then ` where out1 is ufixed(2 downto -1)
2) `sig1 <= const1 + "0001001000";` where sig1 and const1 are
sfixed types.
What is the behavior expected from compilers when string literals are
used along with ufixed/sfixed? Does this really makes sense to use
string literals directly with sfixed/ufixed.
Thanks,
Mohit Gogia
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