Hi, Just a reminder to vote. Note it is due this Friday due to the LRM needing to be frozen for Accellera board review so it can be approved at DAC this year. Best Regards, Jim ------------------------------------------- Dear colleagues, This is a call for vote from IEEE P1076 WG members on the next group of ISAC issues listed below. The ISAC has analyzed the issues and made recommendations for interpretation of the IEEE 1076-2002 standard and for future revisions of the standard. This vote is for approval of the ISAC recommendations. Please note that, in some cases, a recommendation may be to reject a request. In that case, a vote to approve the recommendation means rejecting the request, whereas a negative vote means reconsidering the request. Please take care with the logical sense of your vote in such cases. Also note that some of the issues do not specify detailed LRM edits to implement a change. The intention is that the detailed changes be specified in a Language Change Specification (LCS) document that will be voted on separately. The intent of this vote is to determine whether such an LCS is required. Only votes of eligible voters will be counted. Votes from ineligible voters will be recorded for information and for adding to your "last 2 or 3" participation count. I will acknowledge each vote received and indicate whether it was counted or not. Please forward votes to me by email (eg, by replying to this message) by 5pm US-PDT, Friday June 2, 2006. For each issue, would you please vote one of: approve, negative with comments, negative with no comments, or abstain. You may also provide informative comments with a vote to approve a recommendation. Please use the form below. Thank you. Regards, Jim Lewis P1076 Chair Issue Approve Negative Negative Abstain with comment no comment 2038 ISAC-Approved Minor semantic errors http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2038.txt 2038 ____ ____ ____ ____ Comment: 2062 ISAC-Approved Range staticness http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2062.txt 2062 ____ ____ ____ ____ Comment: 2074 ISAC-Approved Problem with direct/select visibility in formal part http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2074.txt 2074 ____ ____ ____ ____ Comment: 2082 ISAC-Approved Elaboration of unconstrained interface objects http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2082.txt 2082 ____ ____ ____ ____ Comment: 2085 ISAC-Approved What happens when a parameter of mode out is not assigned in a procedure? http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2085.txt 2085 ____ ____ ____ ____ Comment: 2086 ISAC-Approved Incorrect description of type mark in disconnection specification http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2086.txt 2086 ____ ____ ____ ____ Comment: 2091 ISAC-Approved Translation between std_logic_vector based types and std_ulogic_vector http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2091.txt 2091 ____ ____ ____ ____ Comment: 2092 Analyzed Type conversions don't allow for null arrays http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2092.txt 2092 ____ ____ ____ ____ Comment: 2093 ISAC-Approved Static type conversions and qualified expressions http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2093.txt 2093 ____ ____ ____ ____ Comment: 2094 ISAC-Approved Attribute specifications of overloaded subprograms is limited http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2094.txt 2094 ____ ____ ____ ____ Comment: 2095 ISAC-Approved What is the entity class of an enumeration literal? http://www.eda-twiki.org/isac/IRs-VHDL-2002/IR2095.txt 2095 ____ ____ ____ ____ Comment:Received on Tue May 30 07:38:02 2006
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